1. Field of the Invention
The present invention relates to a laminated substrate for semiconductor device and its manufacturing method, and more particularly to a composite substrate for a semiconductor device in which a power device and a control circuit for the power device are integrated, and its manufacturing method.
2. Description of the Prior Art
A composite dielectrically isolated substrate for monolithically integrates a power device having a current path from the front surface of a substrate to the rear surface and a device, for control circuit for the power device, having current path only on the front surface of the substrate, and its manufacturing method, are disclosed in Japanese Patent Laid Open No. H3-142952. The method for manufacturing a substrate disclosed in the above mentioned patent specification is described below by reference to FIGS. 1a a to 1e.
First, as shown in FIG. 1a, a single crystal silicon substrate 10 is processed to have a thick portion 20 for forming a power device, a thin portion 21 for forming a control circuit device and an isolating groove being provided between them. Next, as shown in FIG. 1b, a silicon dioxide film 11 is formed on the entire surface of the rugged surface side of the substrate including the isolating groove. Then, as shown in FIG. 1c, a polycrystalline silicon layer 12 is deposited on the silicon dioxide film 11. In the next step, as shown in FIG. 1d, the substrate is polished until the single crystal portion 20 of the substrate 10, for forming a power device, is exposed, and mirror surface 22 is formed. Then, as shown in FIG. 1e, the mirror surface 22 of the substrate 10 and a mirror surface 25 of a single crystal silicon support substrate 13 are brought into contact with and bonded by heat treatment, and the silicon substrate 10 is polished from the side 23 until the silicon dioxide film 11 is exposed. Thus, a composite dielectrically isolated substrate having a device formation surface 24 is obtained. It is possible to form a power device having a current path from an electrode formed on the surface 24 of the portion 20 to a rear surface electrode formed on rear surface 26 of the support substrate 13, and it is possible to isolate by the silicon dioxide film 11 the power device from the control circuit device formed on the surface 24 of the portion 21.
In this conventional technology for composite dielectrically isolated substrate, it is necessary to polish three phases (single crystal silicon, silicon dioxide and polycrystalline silicon) into mirror surfaces on the same plane in order to obtain a bonding surface, but silicon dioxide has a higher hardness compared with single crystal silicon and polycrystalline silicon and it is difficult to uniformly polish them.
Moreover, the polishing process and the bonding process are carried out in a condition in which the silicon dioxide film and the poly crystalline silicon film are embedded in the single crystal silicon substrate. Therefore, a warp of the substrate becomes large in the polishing process and the bonding process which led to the generation of such problems as distortion and dislocation of single crystal of the element region.